3x Energy Efficiency Improvement & Reduced Heat Generation
Leading Next-Next-Generation Technology with a ‘Do-or-Die’ Mindset
"In the AI Era, HBM Capabilities Equal National Competitiveness"

Samsung Electronics has shocked the global semiconductor industry by introducing a groundbreaking next-generation memory architecture that delivers performance up to eight times faster than HBM5—a standard that has not even been officially released to the market yet.
Until about a decade ago, Samsung’s memory technology was evaluated as being at least two years ahead of its global competitors, with rivals competing merely to narrow the multi-year technology gap separating them from Samsung’s DRAM.
However, amidst the rapid rise of artificial intelligence, a misstep in timing within the High Bandwidth Memory (HBM) market caused Samsung Electronics to lose its long-held world No. 1 spot in the DRAM market to SK Hynix in the first half of last year.
In response, Executive Chairman Lee Jae-yong stepped forward. Emphasizing that technological excellence is the core foundation of competitiveness, Chairman Lee stressed that 2026 represents the "final opportunity to secure fundamental competitiveness." Driven by the leader’s strong mandate—evoking a "do-or-die" mindset—Samsung’s legendary 'super-gap' DNA has been reignited.
After turning the tide earlier this year by becoming the world's first to mass-produce HBM4, prompting comments that "Samsung is back," Samsung Electronics has once again astonished the world by leapfrogging future roadmaps with its latest technology preview.
Direct 3D Stacking: The Architecture of zHBM
During his keynote speech on August 4 (local time) at the 'FMS 2026' memory conference held at the Santa Clara Convention Center in California, Kyung-ryun Kim, Senior Vice President of DRAM Development at Samsung Electronics, unveiled a visual mockup of the 3D architecture technology named 'zHBM'.
SVP Kim confidently stated, "Samsung is back." A mockup refers to a physical prototype crafted to visually demonstrate a product's structure and form factor.
Rather than placing HBM horizontally adjacent to the AI accelerator (xPU) on a substrate—as is done in conventional architectures—zHBM takes a radical leap forward by vertically stacking HBM directly on top of the AI accelerator. By dramatically shortening the physical distance between the processor and memory, zHBM maximizes data transmission speeds to unprecedented levels.
According to Samsung, zHBM delivers up to 8 times higher performance per GPU compared to projected HBM5 specifications, while improving performance-per-watt (energy efficiency) by up to 3 times.
In terms of thermal control, thermal resistance values drop to 10%–25% of HBM5 levels, effectively reducing heat resistance by more than half.
Furthermore, SVP Kim revealed that for HBM5 (currently under development), Samsung is implementing Gate-All-Around (GAA) transistors for the first time in HBM history on a foundry 2-nanometer (nm) ultra-fine process. Additionally, by applying specialized thermal dissipation structures to the side of the core die, Samsung has enhanced thermal control performance by over 20% compared to previous generations.
Comprehensive AI & Flash Memory Roadmap
Following the DRAM announcement, Jin-yup Lee, Executive Vice President of Flash Development, introduced 'zNAND-O', a next-generation NAND flash solution optimized for on-device AI environments. Samsung also publicly debuted its 10th-generation V-NAND ('V10 BV-NAND'), featuring over 400 vertically stacked layers—an industry first.
Industry experts praised Samsung for proactively establishing technology benchmarks beyond HBM4E and HBM5, even as global memory leaders are just beginning mass production of HBM4.
This technological leap is particularly meaningful at a time when the United States and Japan are striving to revive their domestic semiconductor sectors, and Chinese competitors are aggressively pursuing market share. Josephine Lau, an analyst at French market research firm Yole Group, predicted at the event that South Korea’s memory industry competitiveness will remain dominant for years to come.
However, Yole Group noted that an analysis of ChangXin Memory Technologies (CXMT) DRAM indicates Chinese manufacturers have reached the 1z process (10nm-class 3rd generation), a milestone commercialized by industry leaders in 2019.
Dae-jong Kim, Professor of Business Administration at Sejong University, stated, "Samsung Electronics presenting its vision for zHBM goes beyond current product competition—it signifies an intent to pre-emptively establish the technological standard for future markets. In the AI era, HBM technological capability directly equals national competitiveness. Continued R&D investment and supportive government policy will be critical to sustaining K-semiconductor's super-gap leadership."
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